SV-Gap documentation

SV-Gap makes the gap between “passes the benchmark” and “reviewable by a chip-design team” explicit for AI-generated digital RTL.

Start here

• Inspect the controlled result without installing anything
• Create and interpret a local evidence profile
• Run one packaged model-evaluation task
• Run or report the eight-task Harbor experiment
• Bring your own RTL
• Integrate an existing benchmark
• Study frontier-model handoff capability
• Request a research scoping call or email the maintainer
• Explore the design-partner workflow

Trust boundary

SV-Gap runs locally and performs no telemetry or artifact uploads. Generated RTL and functional commands are untrusted input; use the network-disabled evaluation workflow for outputs you have not reviewed. Results are bounded evidence profiles, not certification or silicon signoff.

Copy-paste JSON demo

Use --json with --output when a CI job, issue, or agent benchmark needs a machine-readable first result and a preserved reproducer:

svgap demo --json --output demo-output \
  | jq '{status, safe: .safe.structural, unsafe: .unsafe.structural, findings: .unsafe.findings}'

{
  "findings": [
    "REF-RDC-001"
  ],
  "safe": "pass",
  "status": "pass",
  "unsafe": "fail"
}

Attach demo-output/summary.json, both */build/report.json files, and the preserved manifests/RTL sources when filing an issue or publishing a CI artifact. Do not commit demo-output; it is generated evidence.

Claim boundary: this controlled witness shows that the supplied functional oracle does not identify the structural reset-release finding. It is not a defect-rate estimate or silicon signoff.

Build the ecosystem

• See the current research collaboration pulse
• Choose a research collaboration path
• Write a checker backend
• Understand the architecture
• Review the scope boundary
• Contribute

Research evidence

• Compact research note
• Controlled result
• Reset-release result
• Benchmark audit
• Methodology
• Limitations